TSMC Develops New Chip Packaging Technology to Accelerate AI Advancements, New York, NY 10001

Taiwan Semiconductor Manufacturing Co. (TSMC), the world’s largest semiconductor manufacturer, is exploring a novel chip packaging method to meet the growing demand for computing power driven by advancements in artificial intelligence.

According to Nikkei Asia, TSMC plans to use rectangular substrates instead of traditional round wafers. This change would allow more chips to be placed on each substrate, increasing production efficiency and reducing unused space.

Although this research is in its early stages, transitioning to rectangular substrates will require significant effort and investment. TSMC and its suppliers will need to upgrade or replace numerous manufacturing tools and materials.

The rectangular substrates under testing measure 510 by 515 millimeters, more than three times the area of standard round wafers. This increase in size could significantly enhance material utilization efficiency.

TSMC already employs advanced chip stacking and assembly technologies to produce chips for companies like Nvidia and AMD. Manufacturing AI chips, such as Nvidia’s H200 and B200, demands not only cutting-edge chip production technology but also advanced packaging techniques like TSMC’s CoWoS (chip-on-wafer-on-substrate).

As chip sizes grow and more memory is integrated, new packaging approaches are essential. The current 12-inch wafers may not be efficient enough for packaging the latest chips in the coming years. For instance, a single wafer can only accommodate 16 sets of B200 chips with a 100% yield, which is insufficient to meet the rising market demands.

“Packaging sizes will continue to increase as chipmakers strive to maximize computing power for AI data centers,” noted an industry executive. However, this process is still in its infancy, requiring significant funding and effort to implement.

Experts highlight that while display and printed circuit board manufacturers have experience with rectangular substrates, chip production demands a higher level of equipment and material precision.

Mark Li, a semiconductor analyst at Bernstein Research, believes TSMC may soon need to adopt rectangular substrates as AI chips will require more chips within a single package.

Despite the inevitability of this transition, TSMC is collaborating with equipment and material suppliers to develop this new methodology, which could take several years to commercialize.

The advancement of artificial intelligence necessitates new technological solutions, and TSMC is actively working on innovative chip packaging methods to elevate computing power to new heights.

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